COM Event WORD

The appropriate bits in the COM Event WORD are set by the device driver when the events described below occur. The COM Event WORD is not cleared unless this function is performed by the physical device driver or an OPEN request packet is received by the physical device driver and the COM device is not already open.

Bit 0

Set when any character is read from the COM device receive hardware and placed in the receive queue.
Bit 1
Set whenever the serial port controller generates a Receive Timeout Interrupt during a Receive request. This bit is always zero when the serial port controller does not support Extended Hardware Buffering.
Bit 2
Set when the last character in the physical device driver transmit queue is sent to the COM device transmit hardware. Data in any outstanding Write requests still might need to be sent.
Bit 3
Set when the Clear To Send (CTS) signal changes state.
Bit 4
Set when the Data Set Ready (DSR) signal changes state.
Bit 5
Set when the Data Carrier Detect (DCD) signal changes state.
Bit 6
Set when a break is detected.
Bit 7
Set when a parity, framing, or receive hardware (or receive queue) overrun error occurs.
Bit 8
Set when trailing edge of Ring Indicator is detected.
Bits 9-15
Undefined.

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